module booth2_pp_gen( pp_out, pp_s, pp_e, mcand, booth2 );
   parameter WIDTH = 17;

   output logic [WIDTH-1:0] pp_out;
   output logic 			pp_s;
   output logic 			pp_e;
   
   input logic [WIDTH-1:0] 	mcand;
   input logic [2:0] 		booth2;
   
   always_comb
	 begin
		unique case(booth2)
		  3'b000, 3'b111:		// 0
			begin
			   pp_out = '0;
			   pp_s = 1'b0;
			   pp_e = 1'b1; // when booth2 recoding is 0 or has the same sign with multiplicand, pp_e is 1; otherwise 0
			end		// infact, E[i] is the inv of sign of PP[i]
		  3'b001, 3'b010:		// +A
			begin
			   pp_out = mcand[WIDTH-1:0];
			   pp_s = 1'b0;
			   pp_e = mcand[WIDTH-1] ? 1'b0 : 1'b1;
			end
		  3'b011:				// +2A
			begin
			   pp_out = {mcand[WIDTH-2:0], 1'b0};
			   pp_s = 1'b0;
			   pp_e = mcand[WIDTH-1] ? 1'b0 : 1'b1;
			end
		  3'b100:				// -2A
			begin
			   pp_out = {~mcand[WIDTH-2:0], 1'b1};
			   pp_s = 1'b1;
			   pp_e = mcand[WIDTH-1] ? 1'b1 : 1'b0;
			end
		  3'b101, 3'b110:		// -A
			begin
			   pp_out = ~mcand[WIDTH-1:0];
			   pp_s = 1'b1;
			   pp_e = mcand[WIDTH-1] ? 1'b1 : 1'b0;
			end
		endcase // case (booth2)
	 end // always_comb
   
		  
   // sel_0 = (booth2 == 3'b000) || (booth2 == 3'b111);
   // sel_A = (booth2 == 3'b001) || (booth2 == 3'b010);
   // sel_2A = (booth2 == 3'b011);
   // sel_n2A = (booth2 == 3'b100);
   // sel_nA = (booth2 == 3'b101) || (booth2 == 3'b110);

endmodule // booth2_pp_gen

	 